Pm49FL002 / 004
PMC
COMMAND DEFINITION
Table 14. Software Data Protection Command Definition
1st Bus
Cycle
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cylce
6th Bus
Cycle
Command
Sequence
Bus
Cycle
Addr(2) Data Addr Data Addr Data Addr Data Addr Data Addr Data
Read
1
6
6
6
4
3
3
1
Addr DOUT
Chip Erase (1)
Sector Erase
5555h AAh
5555h AAh
5555h AAh
5555h AAh
5555h AAh
5555h AAh
XXXXh F0h
2AAAh 55h 5555h 80h 5555h AAh 2AAAh 55h 5555h 10h
2AAAh 55h 5555h 80h 5555h AAh 2AAAh 55h SA (3) 30h
2AAAh 55h 5555h 80h 5555h AAh 2AAAh 55h BA (4) 50h
2AAAh 55h 5555h A0h Addr DIN
Block Erase
Byte Program
Product ID Entry
Product ID Exit (5)
Product ID Exit (5)
2AAAh 55h 5555h 90h
2AAAh 55h 5555h F0h
Notes:
1. Chip erase is available in A/A Mux Mode only.
2. Address A[15:0] is used for SDP command decoding internally and A15 must be “0” in FWH/LPC and A/A
Mux modes. AMS - A16 = Don’t care where AMS is the most-significant address of Pm49FL00x.
3. SA = Sector address to be erased.
4. BA = Block address to be erased.
5. Either one of the Product ID Exit command can be used.
Issue Date: December, 2003 Rev: 1.4
Programmable Microelectronics Corp.
30
PMC [ PMC-SIERRA, INC ]
