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PM4351-RI 参数 Datasheet PDF下载

PM4351-RI图片预览
型号: PM4351-RI
PDF下载: 下载PDF文件 查看货源
内容描述: 联合E1 / T1收发器 [COMBINED E1/T1 TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 485 页 / 3011 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4351 COMET  
DATA SHEET  
PMC-1970624  
ISSUE 10  
COMBINED E1/T1 TRANSCEIVER  
Pin Name  
Type  
Pin No.  
Function  
-RI  
-NI  
D1  
TFP  
Digital  
Output  
7
Transmit Digital Frame Pulse (TFP). When the transmit digital line interface is  
enabled, the TFP output indicates frame alignment of the line side transmitted  
PCM stream (TDAT). This mode may be used in applications not requiring a  
physical T1/E1 interface (e.g. interfacing to HDSL transceivers). TFP is  
updated on the either the rising or falling (default) edge of TCLKO.  
Table 4  
- Receive Line Interface (4 pins)  
Pin Name  
Type  
Pin No.  
-RI -NI  
C7  
Function  
RXTIP  
RXRING  
RDAT  
Analog  
Input  
63  
64  
57  
Receive Analog Positive Pulse (RXTIP). When the analog receive line  
interface is enabled, RXTIP samples the received line pulse signal from an  
external isolation transformer. RXTIP is normally connected directly to the  
positive lead of the receive transformer secondary.  
Analog  
Input  
A8  
E8  
Receive Analog Negative Pulse (RXRING). When the analog receive line  
interface is enabled, RXRING samples the received line pulse signal from an  
external isolation transformer. RXRING is normally connected directly to the  
negative lead of the receive transformer secondary.  
Input  
Receive Digital Line Data (RDAT). When the digital receive interface is  
enabled, the RDAT input samples the line side recovered NRZ PCM data  
stream. This mode may be used in applications not requiring a physical T1/E1  
interface (e.g. interfacing to HDSL transceivers). In digital mode, clock and  
data recovery is disabled. RDAT is sampled on the rising (default) or falling  
edge of RCLKI.  
RCLKI  
Input  
56  
D9  
Receive Digital Line Clock (RCLKI). When the digital receive line interface is  
enabled, the externally recovered line rate clock must be provided on RCLKI.  
This mode may be used in applications not requiring a physical T1/E1 interface  
(e.g. interfacing to HDSL transceivers). RCLKI samples the receive PCM  
stream (RDAT) on its rising (default) or falling edge.  
Table 5  
- Timing Options Control (5 pins)  
Pin Name  
Type  
Pin No.  
Function  
-RI  
59  
-NI  
PIO  
I/O  
B9  
Programmable I/O. PIO is an input/output pin controlled by a COMET register  
bit. As an output, the PIO bit can, under software control, be used to configure  
external circuitry dependent upon the mode of the COMET device. As an  
input, the state of the PIO pin can be read via a register bit.  
PROPRIETARY AND CONFIDENTIAL  
24  
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