STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
FIXF:
If the RPRTYE bit is a logic 0, a logic 1 in the FIXF bit forces the first bit of the
BRPCM frame (F-bit for T1) to the polarity specified by the FIXPOL bit.
If RPRTYE is a logic 1, FIXF has no effect. If RPRTYE and FIXF are both
logic 0, the first bit of the frame passes from the line transparently.
FIXPOL:
This bit determines the logic level of the first bit of the BRPCM frame when
the FIXF bit is a logic 1 and the RPRTYE bit is a logic 0. If FIXPOL is a
logic 1, BRPCM will be high in the first bit of the frame. If FIXPOL is a logic 0,
BRPCM will be low in the first bit of the frame.
PTY_EXTD:
The parity extend (PRY_EXTD) bit determines the scope of the parity
calculation. When PTY_EXTD is logic 1, the parity is calculated over the
previous frame plus the previous parity bit. When it is logic 0, the parity is
calculated only over the previous frame.
TRI[1:0]:
The tri-state control bits determine when the BRPCM and BRSIG outputs are
high impedance.
Table 24
- Receive Backplane Tri-state Control
TRI[1] TRI[0] Effect
0
0
1
1
0
1
0
1
BRPCM and BRSIG are held high impedance. This default
ensures the outputs are high impedance during reset and
configuration
Totem-pole operation. BRPCM and BRSIG drive during the
bit periods that contain valid data, i.e. every second or fourth
byte for multiplexed operation.
Open-drain operation. BRPCM and BRSIG are driven low to
indicate a zero. BRPCM and BRSIG are high impedance
otherwise.
Reserved
PROPRIETARY AND CONFIDENTIAL
145
PMC [ PMC-SIERRA, INC ]
