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PM4351-NI 参数 Datasheet PDF下载

PM4351-NI图片预览
型号: PM4351-NI
PDF下载: 下载PDF文件 查看货源
内容描述: 联合E1 / T1收发器 [COMBINED E1/T1 TRANSCEIVER]
分类和应用: 数字传输控制器电信集成电路电信电路PC
文件页数/大小: 485 页 / 3011 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4351 COMET  
DATA SHEET  
PMC-1970624  
ISSUE 10  
COMBINED E1/T1 TRANSCEIVER  
logic 0, the bipolar TXTIP and TXRING outputs are forced to pulse alternately  
every other cycle; when TAUXP and TUNI are both set to logic 1, the unipolar  
TDAT output is forced to toggle every cycle. The transition to transmitting  
AUXP on the TXTIP and TXRING outputs is done in such a way as to not  
introduce any bipolar violations.  
The diagnostic loopback point is upstream of this AUXP insertion point.  
TDATINV:  
The TDATINV bit enables the digital transmit interface to logically invert the  
TDAT signal. When TDATINV is set to logic 1, the TDAT output is active low.  
When TDATINV is set to logic 0, the TDAT output is active high.  
TDATINV only has effect when TUNI is a logic 1.  
TUNI:  
The TUNI bit determines which interface presents the transmit data.  
If TUNI is a logic 1, the transmit data is presented as TTL compatible unipolar  
data on the TDAT output with an associated clock on the TCLKO output and  
frame alignment pulse on the TFP output. The transmit line interface is held  
reset; therefore, the TXTIP and TXRING outputs are high-impedance.  
If TUNI is a logic 0, the transmit data is presented on the TXTIP and TXRING  
as pulses suitable for driving a transformer directly and the TDAT, TFP and  
TCLKO outputs are held low.  
TRISE:  
When TRISE is set to logic 1, the interface is enabled to update the TDAT  
and TFP output pins on the rising edge of TCLKO. When TRISE is set to  
logic 0, the interface is enabled to update the outputs on the falling edge of  
TCLKO.  
PROPRIETARY AND CONFIDENTIAL  
86  
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