PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
Allows insertion of a data link in ESF, T1DM (DDS) or SLC®96 modes. Allows
insertion of the D- channel for Primary Rate interfaces.
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Supports transmission of the alarm indication signal (AIS) or the yellow alarm
signal in all formats.
Provides ESF bit-oriented code generation and an HDLC/LAPD interface for
generating the ESF data link.
Supports polled, interrupt-driven, or DMA servicing of the HDLC interface.
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Provides a digital phase locked loop for generation of a low jitter transmit
clock.
Provides a FIFO buffer for jitter attenuation and rate conversion in the
transmitter. FIFO full or empty indication allows for bit-stuffing in higher rate
multiplexing applications.
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Supports B8ZS or AMI line code.
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Provides analog circuitry for transmitting a DSX-1 signal. Digitally
programmable line build out is provided. Direct digital outputs are also
provided.
Provides dual rail or single rail digital PCM output signals.
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1.1 APPLICATIONS
T1 Channel Service Units (CSU) and Data Service Units (DSU)
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T1 Channel Banks (CH BANK) and Multiplexers (CPE MUX)
Digital Private Branch Exchanges (DPBX)
Digital Access and Cross-Connect Systems (DACS) and Electronic DSX
Cross-Connect Systems (EDSX)
T1 Frame Relay Interfaces
T1 ATM Interfaces
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ISDN Primary Rate Interfaces (PRI)
SONET Add/Drop Multiplexers (ADM)
Test Equipment
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
