PM4341AT1XC
DATA SHEET
PMC-900602
ISSUE 7
T1 FRAMER/TRANSCEIVER
TPSC Internal Registers 19-30H: IDLE Code byte
Bit
Type
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IDLE7
IDLE6
IDLE5
IDLE4
IDLE3
IDLE2
IDLE1
IDLE0
The contents of the IDLE Code byte register is substituted for the channel data
on BTPCM when the IDLC bit in the PCM Control Byte is set to a logic 1.The
IDLE Code is transmitted from MSB (bit 7) to LSB (bit 0).
TPSC Internal Registers 31-48H: SIGNALLING Control byte
Bit
Type
Function
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
SIGC0
SIGC1
Unused
Unused
A'
R/W
R/W
R/W
R/W
B'
C'
D'
Signalling insertion is controlled by the SIGC[1:0] bits. The source of the
signalling bits is determined by SIGC0: when SIGC0 is set to a logic 1, signalling
data is taken from the A', B', C', and D' bits; when SIGC0 is set to logic 0,
signalling data is taken from the A,B,C, and D bit locations on the BTSIG input.
Signalling insertion is controlled by SIGC1: when SIGC1 is set to a logic 1 and
ESF, SF, or SLC®96 transmit format is selected, insertion of signalling bits is
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
135
PMC [ PMC-SIERRA, INC ]
