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PM4328-PI 参数 Datasheet PDF下载

PM4328-PI图片预览
型号: PM4328-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 高密度T1 / E1成帧器,集成M13多路复用器 [HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER]
分类和应用: 复用器数字传输控制器电信集成电路电信电路异步传输模式ATM
文件页数/大小: 250 页 / 1399 K
品牌: PMC [ PMC-SIERRA, INC ]
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STANDARD PRODUCT  
PM4328 TECT3  
DATASHEET  
PMC-2011596  
ISSUE 1  
HIGH DENSITY T1/E1 FRAMER  
AND M13 MULTIPLEXER  
SBI Timing Master Modes  
The TECT3 supports both synchronous and asynchronous SBI timing modes.  
Synchronous modes apply only to T1 tributaries and are used with ingress elastic  
stores to rate adapt the receive tributaries to the fixed SBI data rate.  
Asynchronous modes allow T1 and DS3 to float within the SBI structure to  
accommodate differences in timing. Note that Synchronous mode SBI timing  
operation is required for support of Channel Associated Signaling (CAS).  
In synchronous SBI mode the T1 DS0s are in a fixed format and do not move  
relative to the SBI structure. The SBI frame pulse, SC1FP, in synchronous mode  
can be enabled to indicate CAS signaling multi-frame alignment by pulsing once  
every 12th 2KHz SC1FP frame pulse period. SREFCLK sets the ingress rate from  
the receive elastic store.  
In Asynchronous modes timing is communicated across the Scaleable  
Bandwidth Interconnect by floating data structures within the SBI. Payload  
indicator signals in the SBI control the position of the floating data structure and  
therefore the timing. When sources are running faster than the SBI the floating  
payload structure is advanced by an octet be passing an extra octet in the V3  
octet locations (H3 octet for DS3 mappings). When the source is slower than the  
SBI bus, the floating payload is retarded by leaving the octet after the V3 or H3  
octet unused. Both these rate adjustments are indicated by the SBI control  
signals.  
On the DROP BUS the TECT3 is timing master as determined by the arrival rate  
of data over the SBI.  
On the ADD BUS the TECT3 can be either the timing master or the timing slave.  
When the TECT3 is the timing slave it receives its transmit timing information  
from the arrival rate of data across the SBI ADD bus. When the TECT3 is the  
timing master it signals devices on the SBI ADD bus to speed up or slow down  
with the justification request signal, SAJUST_REQ. The TECT3 as timing master  
indicates a speedup request to a Link Layer SBI device by asserting the  
justification request signal high during the V3 or H3 octet. When this is detected  
by the Link Layer it will speed up the channel by inserting extra data in the next  
V3 or H3 octet. The TECT3 indicates a slowdown request to the Link Layer by  
asserting the justification request signal high during the octet after the V3 or H3  
octet. When detected by the Link Layer it will retard the channel by leaving the  
octet following the next V3 or H3 octet unused. Both advance and retard rate  
adjustments take place in the frame or multi-frame following the justification  
request.  
PROPRIETARY AND CONFIDENTIAL  
159  
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