PRELIMINARY
PM4318 OCTLIU
DATASHEET
PMC- 2001578
ISSUE 3
OCTAL E1/T1/J1 LINE INTERFACE DEVICE
Figure 44 – JTAG Port Interface Timing
TCK
tS
tH
tH
TMS
TDI
TMS
TDI
TMS
tS
TDI
TCK
tP
TDO
TDO
tV
TRSTB
TRSTB
Notes on OCTLIU Timing:
1. High pulse width is measured from the 1.4 Volt points of the rise and fall ramps. Low pulse width is
measured from the 1.4 Volt points of the fall and rise ramps.
2. When a set-up time is specified between an input and a clock, the set-up time is the time in
nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the clock.
3. When a hold time is specified between an input and a clock, the hold time is the time in nanoseconds
from the 1.4 Volt point of the clock to the 1.4 Volt point of the input.
4. Output propagation delay time is the time in nanoseconds from the 1.4 Volt point of the reference
signal to the 1.4 Volt point of the output.
5. Maximum output propagation delays are measured with a 100 pF load on the SBI DROP Bus outputs
(except DACTIVE) and a 50 pF load on DACTIVE and all other outputs. Minimum output propagation
delays are measured with a 0 pF load on the outputs.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
231
PMC [ PMC-SIERRA, INC ]
