PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
Pin Name
Type
Input
Pin
No.
Function
RDUAL
101 Receive Dual-Rail Output Select (RDUAL). This
input selects whether the QDSX generates
single-rail or dual-rail outputs from its receiver
section. The RDUAL input is logically "ORed"
with the RDUAL register bits. When RDUAL is
set high, the RDP[4:1] and RDN[4:1] outputs are
enabled. When both the RDUAL input pin and
register bits are set low, then line decoding is
performed on the receive slicer outputs and the
RDD[4:1] and RLCV[4:1] outputs are enabled.
The state of the DCR input pin or the DCR
register bits takes precedence over the RDUAL
state.
CSB
Input
9
Active low Chip Select (CSB).This signal must be
low to enable QDSX register accesses. CSB
must go high at least once after a powerup to
clear internal test modes. If CSB is not used,
then it should be tied to an inverted version of
RSTB, in which case RDB and WRB determine
register access.
WRB
RDB
Input
Input
10
Active low Write Strobe (WRB).This signal is
pulsed low to enable a QDSX register write
access. The D[7:0] bus is clocked into the
addressed register on the rising edge of WRB
while CSB is low.
Active low Read Enable (RDB).This signal is
pulsed low to enable a QDSX register read
access. The QDSX drives the D[7:0] bus with the
contents of the addressed register while RDB
and CSB are both low.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
24
PMC [ PMC-SIERRA, INC ]
