PAT9125EL Product Datasheet
Optical Tracking Miniature Chip
PixArt Imaging Inc.
4.2 Schematics for SPI Interface (PAT9125EL-TKMT)
The chip only supports simplified 3-wire SPI slave mode, while some host controllers only support standard 4-wire SPI
master mode. In this case, users can connect the host controller to the chip using the method shown below to communicate
each other. Notice that 3.3KΩ for R1 is just for reference and the resistance might have to be modified according to different
I/O capability of different host controllers.
4.2.1 High Voltage Segment (VDD : 2.1V ~ 3.6V)
VDD
VLD
(2.1V ~ 3.6V)
(2.7V ~ 3.6V)
VDDIO
VLD
NCS
INT
NCS
10uF
10uF
0.1uF
VDDA
MOTION
4.7uF
PAT9125EL-TKMT
(TOP VIEW)
Host Controller
MISO
MOSI
SCLK
VDD
VSS
SDIO
R1=3.3KΩ
0.1uF
SCLK
Figure 12. Schematics for High Voltage Segment (SPI Interface)
4.2.2 Low Voltage Segment (VDD : 1.7V ~ 1.9V)
VLD
VDD
(2.7 ~ 3.6V) (1.7 ~ 1.9V)
VDDIO
VLD
NCS
INT
NCS
10uF
10uF
0.1uF
0.1uF
VDDA
MOTION
PAT9125EL-TKMT
(TOP VIEW)
Host Controller
MISO
MOSI
SCLK
VDD
VSS
SDIO
R1=3.3KΩ
SCLK
Figure 13. Schematics for Low Voltage Segment (SPI Interface)
Version 1.2 | 31 May 2017 | 21002AEN
PixArt Imaging Inc. http://www.pixart.com
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