PAT9125EL Product Datasheet
Optical Tracking Miniature Chip
PixArt Imaging Inc.
Reference Schematics
4.1 Schematics for I2C Interface (PAT9125EL-TKIT)
The chip supports standard I2C interface and the SCL clock speed is up to 1MHz. Three different Slave IDs can be selected
from the ID_SEL pin (High = 0x73, Low=0x75, NC = 0x79). Notice that 5KΩ of R1 and R2 (SCL/SDA bus pull-high resistors) is
just for reference and the resistance might have to be adjusted according to the overall I2C bus loading of user’s whole
system.
4.1.1 High Voltage Segment (VDD : 2.1V ~ 3.6V)
VDD
VLD
(2.1V ~ 3.6V)
(2.7V ~ 3.6V)
VDDIO
Slave ID = 0x75 (7-bit)
ID_SEL
VLD
10uF
10uF
0.1uF
INT
SDA
SCL
MOTION
VDD
VDDA
VDD
4.7uF
R1= 5K
PAT9125EL-TKIT
Host Controller
SDA
SCL
(TOP VIEW)
VDD
0.1uF
R2= 5K
VSS
Figure 10. Schematics for High Voltage Segment (I2C Interface)
4.1.2 Low Voltage Segment (VDD : 1.7V ~ 1.9V)
VDD
VLD
(1.7V ~ 1.9V)
(2.7V ~ 3.6V)
VDDIO
Slave ID = 0x75 (7-bit)
ID_SEL
VLD
10uF
10uF
0.1uF
INT
SDA
SCL
MOTION
VDD
5K
VDDA
VDD
PAT9125EL-TKIT
Host Controller
SDA
SCL
(TOP VIEW)
VDD
5K
0.1uF
VSS
Figure 11. Schematics for Low Voltage Segment (I2C Interface)
Version 1.2 | 31 May 2017 | 21002AEN
PixArt Imaging Inc. http://www.pixart.com
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PIXART [ PIXART IMAGING INC. ]
