PixArt Imaging Inc.
PAS109B
CMOS Image Sensor IC
5.3 I
2
C Bus Timing
SDA
t
f
t
LOW
SCL
S
t
HD;STA
t
HD;DAT
t
SU;STA
S
r
t
SU;STO
P
S
t
r
t
SU;DAT
t
f
t
HD;STA
t
SP
t
r
t
BUF
t
HIGH
Fig 5.4 I
2
C Bus Timing
5.4 I
2
C Bus Timing Specification
PARAMETER
SCL clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is generated.
Low period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition
Data hold time. For I2C-bus device
Data set-up time
Rise time of both SDA and SCL signals
Fall time of both SDA and SCL signals
Set-up time for STOP condition
Bus free time between a STOP and START
Capacitive load for each bus line
Noise margin at LOW level for each connected
device (including hysteresis)
Noise margin at HIGH level for each connected
device (including hysteresis)
Note: It depends on the "high" period time of SCL.
STANDARD-MODE
SYMBOL
MIN.
MAX.
UNIT
f
scl
t
HD:STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
SU;DAT
t
r
t
f
t
SU;STO
t
BUF
C
b
V
nL
V
nH
10
4.0
4.7
0.75
4.7
0
250
30
30
4.0
4.7
1
0.1
V
DD
0.2
V
DD
400
-
-
-
-
3.45
-
N.D.
N.D.
-
-
15
-
-
kHz
us
us
us
us
us
ns
ns(note1)
ns(note1)
us
us
pF
V
V
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9
V1.1, Mar. 2002
PixArt Imaging Inc.
E-mail:
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PIXART [ PIXART IMAGING INC. ]
