PixArt Imaging Inc.
ADNS-3090 High-Performance Optical Mouse Sensor
Notes on Power-up and the serial port
Reset Circuit
The chip is put into the power down (PD) mode by
lowering the NPD input. When in PD mode, the oscilla-
tor is stopped but all register contents are retained. To
achieve the lowest current state, all inputs must be held
The ADNS-3090 does not perform an internal power up
self-reset. The reset pin must be raised and lowered to
reset the chip. This should be done every time power is
applied. During power-up there will be a period of time
after the power supply is high but before any clocks are
available. The table below shows the state of the various
pins during power-up and reset when the RESET pin is
driven high by a micro-controller.
externally within 200mV of a rail, either ground or V
.
DD3
The chip outputs are driven low or hi-Z during PD to
prevent current consumption by an external load.
LED Drive Mode
The LED has 2 modes of operation: DC and Shutter. In
DC mode it is on at all times the chip is powered except
when in the power down mode via the NPD pin. In
shutter mode the LED is on only during the portion of
the frame that light is required. The LED_MODE bit in the
Configuration_bits register sets the LED mode.
Power Down Circuit
The following table lists the pin states during power
down.
State of Signal Pins After VDD is Valid
Pin
Before Reset
During Reset
Off
After Reset
On (default)
Functional
SPI pullups
NCS
Undefined
Hi-Z control functional
Hi-Z control functional
MISO
Driven or hi-Z
(per NCS)
Driven or hi-Z
(per NCS)
Low or hi-Z
(per NCS)
SCLK
Undefined
Undefined
Undefined
Functional
Ignored
Ignored
Low
Functional
Functional
High
MOSI
LED_CTRL
RESET
High
Functional
(externally driven)
NPD
Undefined
Ignored
Functional
State of Signal Pins During Power Down
Pin
NPD low
After wake from PD
SPI pullups
NCS
off
pre-PD state
functional
pre-PD state or hi-Z
functional
functional
high
hi-Z control functional
MISO
low or hi-Z (per NCS)
SCLK
ignored
MOSI
ignored
LED_CTRL
RESET
NPD
low
functional
functional
functional
REFC
low (driven externally)
REFC
VDD3
low
OSC_IN
OSC_OUT
OSC_IN
high
OSC_OUT
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission.
PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
22
PIXART [ PIXART IMAGING INC. ]
