Philips Semiconductors
Product specification
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
TDA8358J
EXAMPLE
Measured or known values:
• The east-west power dissipation: PEW = 3 W
• The vertical power dissipation: PV = 6 W
• The maximum (peak) power dissipation of the most
critical transistor: PTRv(peak) = 5 W
T
T
handbook, halfpage
R
EW(M)
TRv(M)
R
• The case temperature: Tc = 85 °C.
The IC total power dissipation is:
Ptot = PEW + PV = 6 + 3 = 9 W
th(EW-P1)
10.5 K/W
th(TRv-P1)
5.2 K/W
P
T
P
TRv(M)
EW
P1(M)
R
It should be noted that the allowed IC total power
dissipation is Ptot = 15 W (maximum value).
th(P1-c)
2.2 K/W
The maximum (peak) temperature TP1(peak) is given by:
P
tot
T
MGL872
• TP1(peak) = Tc + (PEW + PTRv(peak)) × Rth(P1-c)
= 85 + (3 + 5) × 2.2 = 102.6 °C
c
The maximum (peak) junction temperatures for the output
circuits are given by:
• Tj(EW)(peak) = TP1(peak) + Rth(EW-P1) × PEW
= 102.6 + 10.5 × 3 = 134.1 °C
• Tj(TRv)(peak) = TP1(peak) + Rth(TRv-P1) × PTRv(peak)
= 102.6 + 5.2 × 5 = 128.6 °C
Fig.5 Equivalent thermal resistance network.
1999 Dec 22
14
NXP [ NXP ]
