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e
EHT compensation
via vertical size
7 V
EHT compensation
via horizontal size
22
100
nF
(5%)
150
nF
kΩ
1.2 V
(1%)
VREF
23
VCAP
24
VAGC
22
VSMOD
21
HSMOD
31
EWDRV
11
VERTICAL
SYNC INPUT
AND POLARITY
CORRECTION
VERTICAL
SYNC
INTEGRATOR
VERTICAL
OSCILLATOR
AND AGC
EHT COMPENSATION
HORIZONTAL AND
VERTICAL SIZE
12 VOUT2
13 VOUT1
EW OUTPUT
VERTICAL OUTPUT
VSYNC 14
(TTL level)
HORIZONTAL PINCUSHION
HORIZONTAL CORNER
HORIZONTAL TRAPEZIUM
HORIZONTAL SIZE
VERTICAL LINEARITY
VERTICAL LINEARITY
BALANCE
VERTICAL POSITION
VERTICAL SIZE AND
VERTICAL OVERSCAN
VIDEO CLAMPING
AND
VERTICAL BLANK
CLBL 16
clamping
blanking
or
ASYMMETRIC
EW-CORRECTION
OUTPUT
20 ASCOR
32 FOCUS
HUNLOCK
17
HUNLOCK
OUTPUT
PROTECTION
AND SOFT START
FOCUS
TDA4856
HORIZONTAL
SDA
SCL
19
18
AND VERTICAL
2
I C-BUS
RECEIVER
2
I C-BUS REGISTERS
6
4
3
5
BDRV
BSENS
BOP
V
CC 10
(2)
B+
CONTROL
B+ CONTROL
9.2 to 16 V
SUPPLY
AND
REFERENCE
7
PGND
SGND
APPLICATION
X-RAY
PROTECTION
COINCIDENCE DETECTOR
FREQUENCY DETECTOR
BIN
25
H/C SYNC INPUT
AND POLARITY
CORRECTION
PLL1 AND
HORIZONTAL
POSITION
PLL2, PARALLELOGRAM,
PIN UNBALANCE AND
SOFT START
HSYNC
HDRV
8
15
HORIZONTAL
OSCILLATOR
HORIZONTAL
OUTPUT
(TTL level)
26
27
28
29
30
1
9
2
MGS272
(video)
HPLL1 HBUF
HREF
HCAP
HPLL2
HFLB
XSEL XRAY
10 nF
(2%)
12 nF
R
HBUF
(1)
3.3 kΩ
8.2
nF
R
HREF
(1%)
100 nF
(1) For the calculation of fH range see Section “Calculation of line frequency range”.
(2) See Figs 22 and 23.
Fig.1 Block diagram and application circuit.
NXP [ NXP ]
