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SAA7185WP 参数 Datasheet PDF下载

SAA7185WP图片预览
型号: SAA7185WP
PDF下载: 下载PDF文件 查看货源
内容描述: 数字视频编码器DENC2 [Digital Video Encoder DENC2]
分类和应用: 转换器色度信号转换器消费电路商用集成电路编码器
文件页数/大小: 36 页 / 252 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
Preliminary specification
Digital Video Encoder (DENC2)
FEATURES
CMOS 5 V device
Digital PAL/NTSC encoder
System pixel frequency 13.5 MHz
Accepts MPEG decoded data
8-bit wide MPEG port
Input data format Cb, Y, Cr etc. (CCIR 656)
16-bit wide YUV input port
I
2
C-bus control or alternatively MPU parallel control port
Encoder can be master or slave
Programmable horizontal and vertical input
synchronization phase
Programmable horizontal sync output phase
OSD overlay with Look-Up Tables (LUTs) 8
×
3 bytes
Colour bar generator
Line 21 Closed Caption encoder
Cross-colour reduction
DACs operating at 27 MHz with 10-bit resolution
Controlled rise/fall times of output syncs and blanking
Down-mode of DACs
CVBS and S-Video output simultaneously
PLCC68 package.
QUICK REFERENCE DATA
SYMBOL
V
DDA
V
DDD
I
DDA
I
DDD
V
i
V
o(p-p)
R
L
ILE
DLE
T
amb
analog supply voltage
digital supply voltage
analog supply current
digital supply current
input signal voltage levels
analog output signal voltages Y, C and CVBS without load
(peak-to-peak value)
load resistance
LF integral linearity error
LF differential linearity error
operating ambient temperature
80
0
PARAMETER
MIN.
4.75
4.5
TYP.
5.0
5.0
50
140
2
GENERAL DESCRIPTION
SAA7185
The SAA7185 encodes digital YUV video data to an
NTSC, PAL CVBS or S-Video signal.
The circuit accepts CCIR compatible YUV data with
720 active pixels per line in 4 : 2 : 2 multiplexed formats,
for example MPEG decoded data. It includes a sync/clock
generator and on-chip Digital-to-Analog Converters
(DACs).
The circuit is compatible to the DIG-TV2 chip family.
MAX.
5.25
5.5
55
170
±2
±1
+70
V
V
UNIT
mA
mA
V
LSB
LSB
°C
TTL compatible
1996 Jul 08
2