Philips Semiconductors
Preliminary specification
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb filter, VBI-data slicer and high performance scaler
SAA7114H
15.2.20 SUBADDRESS 13H
Table 57 RT/X-port output control; 13H[7:0]
BIT
DESCRIPTION
SYMBOL VALUE
FUNCTION
D7 RTCO output enable
RTCE
0
1
0
1
3-state
enabled
D6 X-port XRH output
selection
XRHS
HREF (see Fig.23)
HS:
programmable width in LLC8 steps via HSB[7:0]06H[7:0]
and HSS[7:0]07H[7:0]
fine position adjustment in LLC2 steps via
HDEL[1:0]11H[5:4] (see Fig.23)
D[5:4] X-port XRV output
selection
XRVS[1:0]
00
01
10
11
0
V123 (see Figs 21 and 22)
ITU 656 related field ID (see Figs 21 and 22)
inverted V123
inverted ITU 656 related field ID
copy of inverted HLCK status bit (default)
fast horizontal lock indicator (for special applications only)
ITU 656
D3 horizontal lock indicator
selection
HLSEL
1
D[2:0] XPD7 to XPD0 (port
output format selection);
see Section 9.4
OFTS[2:0]
000
001
ITU 656 like format with modified field blanking according to
VGATE position (programmable via VSTA8 to VSTA0,
VSTO8 to VSTO0 and VGPS, subaddresses 15H,
16H and 17H)
010
011
100
YUV 4 : 2 : 2 8-bit format (no SAV/EAV codes inserted)
reserved
multiplexed AD2/AD1 bypass (bits 8 to 1) dependent on
mode settings; if both ADCs are selected AD2 is output at
CREF = 1 and AD1 is output at CREF = 0
101
multiplexed AD2/AD1 bypass (bits 7 to 0) dependent on
mode settings; if both ADCs are selected AD2 is output at
CREF = 1 and AD1 is output at CREF = 0
110
111
reserved
multiplexed ADC MSB/LSB bypass dependent on mode
settings; only one ADC should be selected at a time;
ADx8 to ADx1 are outputs at CREF = 1 and ADx7 to ADx0
are outputs at CREF = 0
2000 Mar 15
101
NXP [ NXP ]
