Philips Semiconductors
Product specification
RDS/RBDS pre-processor
SAA6588
I2C-BUS PROTOCOL
I2C-bus format
enable a variation if the slave address is already occupied
by another device of the radio set. Data is transferred with
the most significant bit (MSB) first. Each transmitted byte
is followed by an acknowledge bit ‘A’ (SDA = LOW). Every
transmission is completed with a STOP condition ‘P’
generated by the master.
In communication with the pre-processor two basic types
of I2C-bus protocols are allowed (see Tables 16 and 17).
Every transmission begins with a START condition ‘S’
followed by the 7-bit slave address and the R/W mode bit,
all generated by the external master.
During read or write transfer the master can abridge the
data transfer by generation of a STOP condition. In case
of transmission errors during a write cycle, the
pre-processor can indirectly stop the transfer by
generating no acknowledge (SDA = HIGH) hereafter the
master can send the STOP condition.
The 6 higher bits of the pre-processors slave address are
fixed to 001000. The least significant bit of the slave
address can be set via the external input pin MAD to
Table 16 Transmitting to the pre-processor (write transfer)
S(1)
SLAVE ADDRESS(2)
W(3)
A(4)
DATA(5)
A(4)
DATA(5)
A(4)
DATA(5)
A(4)
P(6)
Notes
1. S = START condition.
2. Slave address (depends on level at pin MAD) = 0010000 or 0010001.
3. W = write mode.
4. A = acknowledge bit (SDA = LOW).
5. Subsequently data bytes 0W, 1W and 2W.
6. P = STOP condition.
Table 17 Receiving from the pre-processor (read transfer)
S(1)
SLAVE ADDRESS(2)
R(3)
A(4)
DATA(5)
A(4)
DATA(5)
A(6)
P(7)
Notes
1. S = START condition.
2. Slave address (depends on level at pin MAD) = 0010000 or 0010001.
3. R = read mode.
4. A = acknowledge bit (SDA = LOW). Six DATA-acknowledge sequences must occur before the DATA-not
acknowledge sequence.
5. Subsequently data bytes 0R to 6R.
6. A = no acknowledge (SDA = HIGH).
7. P = STOP condition.
1997 Sep 01
19
NXP [ NXP ]
