Philips Semiconductors
Product specification
Compandor
SA571
∆G
R
2
R
1
*
C
RECT
*
R
DC
*
C
DC
V
OUT
V
REF
NOTES:
GAIN
+
I
B
= 140µA
External components
*
C
F
have typical NPN
βs
of 200 and PNP
βs
of 40. The
a’s
of 0.995 and
0.975 will produce errors of 0.5% on negative swings and 2.5% on
positive swings. The 1.5% average of these errors yields a mere
0.13dB gain error.
At very low input signal levels the bias current of Q
2
, (typically
50nA), will become significant as it must be supplied by Q
5
. Another
low level error can be caused by DC coupling into the rectifier. If an
offset voltage exists between the V
IN
input pin and the base of Q
2
,
an error current of V
OS
/R
1
will be generated. A mere 1mV of offset
will cause an input current of 100nA which will produce twice the
error of the input bias current. For highest accuracy, the rectifier
should be coupled into capacitively. At high input levels the
β
of the
PNP Q
6
will begin to suffer, and there will be an increasing error until
the circuit saturates. Saturation can be avoided by limiting the
current into the rectifier input to 250µA. If necessary, an external
resistor may be placed in series with R
1
to limit the current to this
value. Figure 11 shows the rectifier accuracy vs input level at a
frequency of 1kHz.
V+
R
DC
C
IN
V
IN
R
4
*
R
3
1
R1 R2 IB 2
2R 3 V INavg
SR00682
Figure 8. Basic Compressor
I = V
IN
/ R
1
V+
Q
3
R
1
V
IN
R
S
10k
C
R
I
G
Q
6
I
1
I
2
D
1
Q
1
Q
2
Q
4
Q
5
Q
7
R
1
10k
V
IN
R
S
10k
Q
8
Q
9
C
R
SR00684
V–
NOTE:
IG
+
2
V IN avg
R 1
Figure 9. Rectifier Concept
CIRCUIT DETAILS—RECTIFIER
Figure 9 shows the concept behind the full-wave averaging rectifier.
The input current to the summing node of the op amp, V
IN
R
1
, is
supplied by the output of the op amp. If we can mirror the op amp
output current into a unipolar current, we will have an ideal rectifier.
The output current is averaged by R
5
, CR, which set the averaging
time constant, and then mirrored with a gain of 2 to become I
G
, the
gain control current.
Figure 10 shows the rectifier circuit in more detail. The op amp is a
one-stage op amp, biased so that only one output device is on at a
time. The non-inverting input, (the base of Q
1
), which is shown
grounded, is actually tied to the internal 1.8V V
REF
. The inverting
input is tied to the op amp output, (the emitters of Q
5
and Q
6
), and
the input summing resistor R
1
. The single diode between the bases
of Q
5
and Q
6
assures that only one device is on at a time. To detect
the output current of the op amp, we simply use the collector
currents of the output devices Q
5
and Q
6
. Q
6
will conduct when the
input swings positive and Q
5
conducts when the input swings
negative. The collector currents will be in error by the
a
of Q
5
or Q
6
on negative or positive signal swings, respectively. ICs such as this
SR00683
Figure 10. Simplified Rectifier Schematic
At very high frequencies, the response of the rectifier will fall off. The
roll-off will be more pronounced at lower input levels due to the
increasing amount of gain required to switch between Q
5
or Q
6
conducting. The rectifier frequency response for input levels of
0dBm, -20dBm, and -40dBm is shown in Figure 12. The response at
all three levels is flat to well above the audio range.
+1
ERROR GAIN dB
0
–1
–40
–20
0
RECTIFIER INPUT dBm
SR00685
Figure 11. Rectifier Accuracy
1997 Aug 14
6
PHILIPS [ NXP SEMICONDUCTORS ]
