Philips Semiconductors
Product specification
Compandor
SA571
CIRCUIT DESCRIPTION
The SA571 compandor building blocks, as shown in the block
diagram, are a full-wave rectifier, a variable gain cell, an operational
amplifier and a bias system. The arrangement of these blocks in the
IC result in a circuit which can perform well with few external
components, yet can be adapted to many diverse applications.
The full-wave rectifier rectifies the input current which flows from the
rectifier input, to an internal summing node which is biased at V
REF
.
The rectified current is averaged on an external filter capacitor tied
to the C
RECT
terminal, and the average value of the input current
controls the gain of the variable gain cell. The gain will thus be
proportional to the average value of the input signal for
capacitively-coupled voltage inputs as shown in the following
equation. Note that for capacitively-coupled inputs there is no offset
voltage capable of producing a gain error. The only error will come
from the bias current of the rectifier (supplied internally) which is
less than 0.1µA.
G
T
or
G
T
| V
IN
| avg
R
1
|V
IN
*
V
REF
| avg
R
1
bias current for the
∆G
cell. The low tempco of this type of reference
provides very stable biasing over a wide temperature range.
The typical performance characteristics illustration shows the basic
input-output transfer curve for basic compressor or expander
circuits.
COMPRESSOR INPUT LEVEL OR EXPANDOR OUTPUT LEVEL (dBm)
+20
+10
0
–10
–20
–30
–40
–50
–60
–70
–80
–40
–30
–20
–10
0
+10
The speed with which gain changes to follow changes in input signal
levels is determined by the rectifier filter capacitor. A small capacitor
will yield rapid response but will not fully filter low frequency signals.
Any ripple on the gain control signal will modulate the signal passing
through the variable gain cell. In an expander or compressor
application, this would lead to third harmonic distortion, so there is a
trade-off to be made between fast attack and decay times and
distortion. For step changes in amplitude, the change in gain with
time is shown by this equation.
G(t)
+
(G
initial
*
G
final
)
e
*
t
t
)
G
final
;
t
+
10k x C
RECT
The variable gain cell is a current-in, current-out device with the ratio
I
OUT
/I
IN
controlled by the rectifier. I
IN
is the current which flows from
the
∆G
input to an internal summing node biased at V
REF
. The
following equation applies for capacitively-coupled inputs. The
output current, I
OUT
, is fed to the summing node of the op amp.
V
IN
*
V
REF
V
IN
+
I
IN
+
R
2
R
2
A compensation scheme built into the
∆G
cell compensates for
temperature and cancels out odd harmonic distortion. The only
distortion which remains is even harmonics, and they exist only
because of internal offset voltages. The THD trim terminal provides
a means for nulling the internal offsets for low distortion operation.
The operational amplifier (which is internally compensated) has the
non-inverting input tied to V
REF
, and the inverting input connected to
the
∆G
cell output as well as brought out externally. A resistor, R
3
, is
brought out from the summing node and allows compressor or
expander gain to be determined only by internal components.
The output stage is capable of
±20mA
output current. This allows a
+13dBm (3.5V
RMS
) output into a 300Ω load which, with a series
resistor and proper transformer, can result in +13dBm with a 600Ω
output impedance.
A bandgap reference provides the reference voltage for all summing
nodes, a regulated supply voltage for the rectifier and
∆G
cell, and a
COMPRESSOR OUTPUT LEVEL
OR
EXPANDOR INPUT LEVEL (dBm)
SR00677
Figure 3. Basic Input-Output Transfer Curve
TYPICAL TEST CIRCUIT
V
CC
= 15V
0.1µF
13
6.11
20k
2.2µF
20k
V
1
3.14
∆G
7.10
V
O
10µF
V
REF
2.2
V
2
2.15
30k
10k
4
1.16
2.2
5.12
8.2k
8.9
200pF
SR00678
Figure 4. Typical Test Circuit
INTRODUCTION
Much interest has been expressed in high performance electronic
gain control circuits. For non-critical applications, an integrated
circuit operational transconductance amplifier can be used, but
when high-performance is required, one has to resort to complex
discrete circuitry with many expensive, well-matched components.
1997 Aug 14
4
PHILIPS [ NXP SEMICONDUCTORS ]
