Philips Semiconductors
Product specification
Low power clock/calendar
PCF8593
SYMBOL
PARAMETER
input capacitance
CONDITIONS
MIN.
TYP.(1)
MAX.
UNIT
Ci
note 4
−
−
7
pF
OSCI and RESET
ILI
input leakage current
Vl = VDD or VSS
−250
−
+250
nA
INT
IOL
ILI
LOW level output current
input leakage current
VOL = 0.4 V
1
−
−
−
mA
Vl = VDD or VSS
−1
+1
µA
SCL
Ci
input capacitance
note 4
−
−
−
7
pF
ILI
input leakage current
VI = VDD or VSS
−1
+1
µA
Notes
1. Typical values measured at Tamb = 25 °C.
2. When powering up the device, VDD must exceed the specified minimum value by 300 mV to guarantee correct
start-up of the oscillator.
3. Event counter mode: supply current dependent upon input frequency.
4. Tested on sample basis.
MBD826
12
handbook, halfpage
I
DDO
(µA)
8
4
0
0
2
4
6
V
(V)
DD
fSCL = 32 kHz; Tamb = 25 °C.
Fig.21 Typical supply current in clock mode as a function of supply voltage.
1997 Mar 25
20
NXP [ NXP ]
