PCF8563
NXP Semiconductors
Real-time clock/calendar
8.10 STOP bit function
The function of the STOP bit is to allow for accurate starting of the time circuits. The STOP
bit function will cause the upper part of the prescaler (F2 to F14) to be held in reset and
thus no 1 Hz ticks will be generated (see Figure 11). The time circuits can then be set and
will not increment until the STOP bit is released (see Figure 12 and Table 26).
OSCILLATOR STOP
reset
DETECTOR
F
F
F
F
F
14
0
1
2
13
OSCILLATOR
1 Hz tick
STOP
RESET
RESET
RESET
1 Hz
32 Hz
CLKOUT source
1024 Hz
32768 Hz
013aaa089
Fig 11. STOP bit functional diagram
The STOP bit function will not affect the output of 32.768 kHz on CLKOUT, but will stop
the generation of 1.024 kHz, 32 Hz, and 1 Hz.
The lower two stages of the prescaler (F0 and F1) are not reset; and because the I2C-bus
is asynchronous to the crystal oscillator, the accuracy of re-starting the time circuits will be
between zero and one 8.192 kHz cycle (see Figure 12).
8192 Hz
stop released
0 μs to 122 μs
001aaf912
Fig 12. STOP bit release timing
PCF8563
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
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