NXP Semiconductors
PCF8563
Real-time clock/calendar
7. Pinning information
7.1 Pinning
terminal 1
index area
OSCI
OSCO
n.c.
INT
V
SS
1
2
3
4
5
10 n.c.
9
V
DD
CLKOUT
SCL
SDA
OSCI
OSCO
INT
V
SS
1
2
8
7
V
DD
CLKOUT
SCL
SDA
PCF8563BS
8
7
6
PCF8563P
3
4
001aaf977
6
5
001aaf981
Transparent top view
For mechanical details, see
Figure 30.
Top view. For mechanical details, see
Fig 2.
Pin configuration for HVSON10
(PCF8563BS)
Fig 3.
Pin configuration for DIP8
(PCF8563P)
OSCI
OSCO
INT
V
SS
1
2
8
7
V
DD
CLKOUT
SCL
SDA
OSCI
OSCO
INT
V
SS
1
2
3
4
001aaf976
8
7
V
DD
CLKOUT
SCL
SDA
PCF8563T
3
4
001aaf975
6
5
PCF8563TS
6
5
Top view. For mechanical details, see
Top view. For mechanical details, see
Fig 4.
Pin configuration for SO8
(PCF8563T)
Fig 5.
Pin configuration for TSSOP8
(PCF8563TS)
PCF8563
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
4 of 50
PHILIPS [ NXP SEMICONDUCTORS ]
