NXP Semiconductors
PCF8563
Real-time clock/calendar
8.2 Register organization
Table 4.
Formatted registers overview
Bit positions labelled as x are not relevant. Bit positions labelled with N should always be written with logic 0; if read they
could be either logic 0 or logic 1. After reset, all registers are set according to
Table 27.
Address Register name
Control and status registers
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
Control_status_1
Control_status_2
VL_seconds
Minutes
Hours
Days
Weekdays
Century_months
Years
Minute_alarm
Hour_alarm
Day_alarm
Weekday_alarm
CLKOUT_control
Timer_control
Timer
TEST1
N
VL
x
x
x
x
C
N
N
STOP
N
N
TI_TP
TESTC
AF
N
TF
N
AIE
N
TIE
Bit
7
6
5
4
3
2
1
0
Time and date registers
SECONDS (0 to 59)
MINUTES (0 to 59)
x
x
x
x
HOURS (0 to 23)
DAYS (1 to 31)
x
x
x
x
WEEKDAYS (0 to 6)
MONTHS (1 to 12)
YEARS (0 to 99)
AE_M
AE_H
AE_D
AE_W
FE
TE
TIMER[7:0]
MINUTE_ALARM (0 to 59)
x
x
x
x
x
HOUR_ALARM (0 to 23)
DAY_ALARM (1 to 31)
x
x
x
x
x
x
x
x
x
WEEKDAY_ALARM (0 to 6)
x
x
FD[1:0]
TD[1:0]
Alarm registers
CLKOUT control register
Timer registers
PCF8563
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© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 10 — 3 April 2012
7 of 50
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