NXP Semiconductors
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
Table 3.
Symbol
RST
P89V51RB2/RC2/RD2 pin description
…continued
Pin
DIP40
9
TQFP44
4
PLCC44
10
I
Reset:
While the oscillator is running, a HIGH logic state
on this pin for two machine cycles will reset the device. If
the PSEN pin is driven by a HIGH-to-LOW input transition
while the RST input pin is held HIGH, the device will enter
the external host mode, otherwise the device will enter the
normal operation mode.
External Access Enable:
EA must be connected to V
SS
in
order to enable the device to fetch code from the external
program memory. EA must be strapped to V
DD
for internal
program execution. The EA pin can tolerate a high voltage
of 12 V.
Address Latch Enable:
ALE is the output signal for
latching the low byte of the address during an access to
external memory. This pin is also the programming pulse
input (PROG) for flash programming. Normally the ALE
is emitted at a constant rate of
1
⁄
6
the crystal frequency
and can be used for external timing and clocking. One ALE
pulse is skipped during each access to external data
memory. However, if AO is set to ‘1’, ALE is disabled.
not connected
Crystal 1:
Input to the inverting oscillator amplifier and
input to the internal clock generator circuits.
Crystal 2:
Output from the inverting oscillator amplifier.
Power supply
Ground
Type
Description
EA
31
29
35
I
ALE/PROG
30
27
33
I/O
n.c.
XTAL1
XTAL2
V
DD
V
SS
[1]
[2]
-
19
18
40
20
6, 17, 28,
39
15
14
38
16
1, 12, 23,
34
21
20
44
22
I/O
I
O
I
I
ALE loading issue: When ALE pin experiences higher loading (>30 pF) during the reset, the microcontroller may accidentally enter into
modes other than normal working mode. The solution is to add a pull-up resistor of 3 kΩ to 50 kΩ to V
DD
, e.g., for ALE pin.
For 6-clock mode, ALE is emitted at
1
⁄
3
of crystal frequency.
P89V51RB2_RC2_RD2_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 12 November 2009
9 of 80
PHILIPS [ NXP SEMICONDUCTORS ]
