Philips Semiconductors
Product data
Single-chip 8-bit microcontroller with 10-bit A/D,
capture/compare timer, high-speed outputs, PWM
80C552/83C552
V
V
DD
DD
I
DD
P1.6
P1.7
V
DD
P0
V
–0.5
DD
0.5 V
V
V
DD
DD
0.7V
DD
–0.1
0.2V
DD
t
CHCX
RST
t
t
CHCL
t
CLCX
CLCH
EA
STADC
EW
(NC)
CLOCK SIGNAL
XTAL2
XTAL1
t
CLCL
AV
SS
V
SS
AV
ref–
SU01706
SU01704
Figure 12. I Test Condition, Active Mode
DD
1
Figure 14. Clock Signal Waveform for I Tests in Active and
DD
All other pins are disconnected
Idle Modes t
= t
= 5ns
CHCL
CLCH
V
V
DD
DD
V
V
DD
I
DD
DD
I
DD
P1.6
P1.6
P1.7
P1.7
V
DD
V
DD
RST
V
DD
V
RST
DD
STADC
STADC
P0
P0
EW
EA
(NC)
XTAL2
XTAL1
EW
EA
(NC)
XTAL2
XTAL1
CLOCK SIGNAL
AV
SS
AV
V
SS
SS
AV
V
ref–
SS
AV
ref–
SU01705
SU01707
Figure 13. I Test Condition, Idle Mode
DD
2
All other pins are disconnected
Figure 15. I Test Condition, Power Down Mode
DD
3
All other pins are disconnected. V = 2 V to 5.5 V
DD
NOTES:
1. Active Mode:
a. The following pins must be forced to V : EA, RST, Port 0, and EW.
DD
b. The following pins must be forced to V : STADC, AV , and AV .
ref–
SS
ss
c. Ports 1.6 and 1.7 should be connected to V through resistors of sufficiently high value such that the sink current into these pins cannot
DD
exceed the I
spec of these pins.
OL1
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
2. Idle Mode:
a. The following pins must be forced to V : Port 0 and EW.
DD
b. The following pins must be forced to V : RST, STADC, AV ,, AV , and EA.
SS
ss
ref–
c. Ports 1.6 and 1.7 should be connected to V through resistors of sufficiently high value such that the sink current into these pins cannot
DD
exceed the I
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
OL1
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
3. Power Down Mode:
a. The following pins must be forced to V : Port 0 and EW.
DD
b. The following pins must be forced to V : RST, STADC, XTAL1, AV ,, AV , and EA.
SS
ss
ref–
c. Ports 1.6 and 1.7 should be connected to V through resistors of sufficiently high value such that the sink current into these pins cannot
DD
exceed the I
spec of these pins. These pins must not have logic 0 written to them prior to this measurement.
OL1
d. The following pins must be disconnected: XTAL2 and all pins not specified above.
20
2002 Sep 03
NXP [ NXP ]
