LPC2210/2220
NXP Semiconductors
16/32-bit ARM microcontrollers
Table 4.
Symbol
Pin description …continued
Pin (LQFP)
Pin (TFBGA) Type
Description
P2.26/D26/
BOOT0
13[5]
F4[5]
I/O
I
D26 — External memory data line 26.
BOOT0 — While RESET is LOW, together with BOOT1
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
P2.27/D27/
BOOT1
16[5]
F1[5]
I/O
I
D27 — External memory data line 27.
BOOT1 — While RESET is LOW, together with BOOT0
controls booting and internal operation. Internal pull-up
ensures HIGH state if pin is left unconnected.
BOOT1:0 = 00 selects 8-bit memory on CS0 for boot.
BOOT1:0 = 01 selects 16-bit memory on CS0 for boot.
BOOT1:0 = 10 selects 32-bit memory on CS0 for boot.
BOOT1:0 = 11 selects 16-bit memory on CS0 for boot.
D28 — External memory data line 28.
P2.28/D28
P2.29/D29
17[5]
18[5]
19[2]
G2[5]
G1[5]
G3[2]
I/O
I/O
I/O
I
D29 — External memory data line 29.
P2.30/D30/
AIN4
D30 — External memory data line 30.
AIN4 — ADC, input 4. This analog input is always connected
to its pin.
P2.31/D31/
AIN5
20[2]
G4[2]
I/O
I
D31 — External memory data line 31.
AIN5 — ADC, input 5. This analog input is always connected
to its pin.
P3.0 to P3.31
I/O
Port 3 — Port 3 is a 32-bit bidirectional I/O port with individual
direction controls for each bit. The operation of port 3 pins
depends upon the pin function selected via the Pin Connect
Block.
P3.0/A0
89[5]
88[5]
87[5]
81[5]
80[5]
74[5]
73[5]
72[5]
71[5]
66[5]
65[5]
64[5]
63[5]
62[5]
56[5]
55[5]
53[5]
48[5]
47[5]
G12[5]
H13[5]
H12[5]
J10[5]
K13[5]
M13[5]
N13[5]
M12[5]
N12[5]
M10[5]
N10[5]
K9[5]
L9[5]
M9[5]
K7[5]
L7[5]
M7[5]
N5[5]
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
A0 — External memory address line 0.
A1 — External memory address line 1.
A2 — External memory address line 2.
A3 — External memory address line 3.
A4 — External memory address line 4.
A5 — External memory address line 5.
A6 — External memory address line 6.
A7 — External memory address line 7.
A8 — External memory address line 8.
A9 — External memory address line 9.
A10 — External memory address line 10.
A11 — External memory address line 11.
A12 — External memory address line 12.
A13 — External memory address line 13.
A14 — External memory address line 14.
A15 — External memory address line 15.
A16 — External memory address line 16.
A17 — External memory address line 17.
A18 — External memory address line 18.
P3.1/A1
P3.2/A2
P3.3/A3
P3.4/A4
P3.5/A5
P3.6/A6
P3.7/A7
P3.8/A8
P3.9/A9
P3.10/A10
P3.11/A11
P3.12/A12
P3.13/A13
P3.14/A14
P3.15/A15
P3.16/A16
P3.17/A17
P3.18/A18
M5[5]
LPC2210_2220_6
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 11 December 2008
12 of 50
NXP [ NXP ]
