Philips Semiconductors
Product specification
N-channel enhancement mode
TrenchMOS
TM
transistor
AVALANCHE LIMITING VALUE
SYMBOL
W
DSS
PARAMETER
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 10 A; V
DD
≤
25 V;
V
GS
= 10 V; R
GS
= 50
Ω;
T
mb
= 25 ˚C
MIN.
-
TYP.
-
IRFZ24N
MAX.
30
UNIT
mJ
120
110
100
90
80
70
60
50
40
30
20
10
0
PD%
Normalised Power Derating
100
tp =
ID/A
RDS(ON) = VDS/ID
10us
10
1 us
100 us
DC
1 ms
10ms
100ms
1
10
0
20
40
60
80 100
Tmb / C
120
140
160
180
1
VDS/V
100
Fig.1. Normalised power dissipation.
PD% = 100
⋅
P
D
/P
D 25 ˚C
= f(T
mb
)
Normalised Current Derating
Fig.3. Safe operating area. T
mb
= 25 ˚C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Zth/ (K/W)
120
110
100
90
80
70
60
50
40
30
20
10
0
ID%
10
1
0.5
0.2
0.1
0.05
P
D
t
p
D=
t
p
T
t
0.1
0.02
T
0
0
20
40
60
80 100
Tmb / C
120
140
160
180
0.01
1.0E-06
0.0001
t/s
0.01
1
100
Fig.2. Normalised continuous drain current.
ID% = 100
⋅
I
D
/I
D 25 ˚C
= f(T
mb
); conditions: V
GS
≥
10 V
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
February 1999
3
Rev 1.000
PHILIPS [ NXP SEMICONDUCTORS ]
