Philips Semiconductors
Product specification
N-channel TrenchMOS™ transistor
IRF530N
FEATURES
•
’Trench’
technology
• Low on-state resistance
• Fast switching
• Low thermal resistance
SYMBOL
d
QUICK REFERENCE DATA
V
DSS
= 100 V
I
D
= 17 A
g
R
DS(ON)
≤
110 mΩ
s
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a
plastic envelope using ’trench’
technology.
Applications:-
• d.c. to d.c. converters
• switched mode power supplies
The IRF530N is supplied in the
SOT78 (TO220AB) conventional
leaded package.
PINNING
PIN
1
2
3
tab
gate
drain
source
drain
DESCRIPTION
SOT78 (TO220AB)
tab
drain
1 2 3
gate
source
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
V
DSS
V
DGR
V
GS
I
D
I
DM
P
D
T
j
, T
stg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
CONDITIONS
T
j
= 25 ˚C to 175˚C
T
j
= 25 ˚C to 175˚C; R
GS
= 20 kΩ
T
mb
= 25 ˚C; V
GS
= 10 V
T
mb
= 100 ˚C; V
GS
= 10 V
T
mb
= 25 ˚C
T
mb
= 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
100
100
±
20
17
12
68
79
175
UNIT
V
V
V
A
A
A
W
˚C
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
E
AS
Non-repetitive avalanche
energy
Peak non-repetitive
avalanche current
CONDITIONS
Unclamped inductive load, I
AS
= 7.8 A;
t
p
= 300
µs;
T
j
prior to avalanche = 25˚C;
V
DD
≤
25 V; R
GS
= 50
Ω;
V
GS
= 10 V; refer
to fig:14
MIN.
-
MAX.
150
UNIT
mJ
I
AS
-
17
A
August 1999
1
Rev 1.100
PHILIPS [ NXP SEMICONDUCTORS ]
