NXP Semiconductors
HEF4053B-Q100
Triple single-pole double-throw analog switch
11.2 Additional dynamic parameters
Table 11. Additional dynamic characteristics
V
SS
= V
EE
= 0 V; T
amb
= 25
C.
Symbol
THD
Parameter
total harmonic distortion
Conditions
V
DD
Typ
0.25
0.04
0.04
13
40
70
50
Max
-
-
-
-
-
-
-
Unit
%
%
%
MHz
MHz
MHz
dB
see
R
L
= 10 k; C
L
= 15 pF; 5 V
channel ON; V
I
= 0.5V
DD
(p-p);
10 V
f
i
= 1 kHz
15 V
see
R
L
= 1 k; C
L
= 5 pF;
channel ON; V
I
= 0.5V
DD
(p-p)
5V
10 V
15 V
10 V
f
(3dB)
3
dB frequency response
iso
isolation (OFF-state)
see
f
i
= 1 MHz; R
L
= 1 k;
C
L
= 5 pF; channel OFF;
V
I
= 0.5V
DD
(p-p)
digital inputs to switch; see
R
L
= 10 k; C
L
= 15 pF;
E or Sn = V
DD
(square-wave)
between switches; see
f
i
= 1 MHz; R
L
= 1 k;
V
I
= 0.5V
DD
(p-p)
V
ct
crosstalk voltage
10 V
50
-
mV
Xtalk
crosstalk
10 V
50
-
dB
[1]
f
i
is biased at 0.5 V
DD
; V
I
= 0.5V
DD
(p-p).
Table 12. Dynamic power dissipation P
D
P
D
can be calculated from the formulas shown; V
EE
= V
SS
= 0 V; t
r
= t
f
20 ns; T
amb
= 25
C.
Symbol
P
D
Parameter
dynamic power
dissipation
V
DD
5V
10 V
15 V
Typical formula for P
D
(W)
P
D
= 2500
f
i
+
(f
o
C
L
)
V
DD2
P
D
= 11500
f
i
+
(f
o
C
L
)
V
DD2
P
D
= 29000
f
i
+
(f
o
C
L
)
V
DD2
where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
DD
= supply voltage in V;
(C
L
f
o
) = sum of the outputs.
11.2.1 Test circuits
V
DD
V
DD
V
DD
or V
SS
S1 to S3
nZ
E
nY0
nY1
1
2
switch
V
DD
or V
SS
S1 to S3
nZ
E
nY0
nY1
1
2
switch
V
SS
fi
V
SS
= V
EE
RL
CL
D
V
SS
fi
V
SS
= V
EE
RL
CL
dB
001aaj904
001aaj905
Fig 16. Test circuit for measuring total harmonic
distortion
Fig 17. Test circuit for measuring frequency response
HEF4053B_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 1 — 22 February 2013
11 of 19
PHILIPS [ NXP SEMICONDUCTORS ]
