NXP Semiconductors
74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
Y
V
CC
V
EE
V
CC
V
CC
V
CC
from
logic
V
EE
Z
V
EE
001aad544
Fig 4.
Schematic diagram (one switch)
6. Pinning information
6.1 Pinning
74HC4053
74HCT4053
2Y1
2Y0
3Y1
3Z
3Y0
E
V
EE
GND
1
2
3
4
5
6
7
8
001aae127
74HC4053
74HCT4053
16 V
CC
15 2Z
14 1Z
13 1Y1
12 1Y0
11 S1
10 S2
9
S3
3Y0
E
V
EE
5
6
7
8
GND
S3
9
V
CC(1)
12 1Y0
11 S1
10 S2
terminal 1
index area
2Y0
3Y1
3Z
2
3
4
16 V
CC
15 2Z
14 1Z
13 1Y1
2Y1
1
001aae128
Transparent top view
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to V
CC
.
Fig 5.
Pin configuration DIP16, SO16, and (T)SSOP16
Fig 6.
Pin configuration DHVQFN16
74HC_HCT4053
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 8 — 19 July 2012
4 of 32
PHILIPS [ NXP SEMICONDUCTORS ]
