NXP Semiconductors
74HC4053; 74HCT4053
Triple 2-channel analog multiplexer/demultiplexer
5. Functional diagram
E
6
V
CC
16
13 1Y1
S1 11
LOGIC
LEVEL
CONVERSION
DECODER
12 1Y0
14 1Z
1 2Y1
S2 10
LOGIC
LEVEL
CONVERSION
2 2Y0
15 2Z
3 3Y1
S3 9
LOGIC
LEVEL
CONVERSION
5 3Y0
4 3Z
8
GND
7
V
EE
001aak341
Fig 1.
Functional diagram
6
11
10
9
S1
S2
S3
1Y0
1Y1
1Z
2Y0
2Y1
2Z
3Y0
3Y1
6
E
3Z
12
13
14
2
1
15
5
3
4
10
15
#
11
14
#
EN
MUX/DMUX
0
×
0
1
0/1
1
12
13
2
1
9
4
#
5
3
001aae126
001aae125
Fig 2.
74HC_HCT4053
Logic symbol
Fig 3.
IEC logic symbol
© NXP B.V. 2012. All rights reserved.
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 8 — 19 July 2012
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