Philips Semiconductors
Product specification
Dual JK flip-flop with reset; negative-edge trigger
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I
CC
category: flip-flops
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t
r
= t
f
= 6 ns; C
L
= 50 pF
T
amb
(°C)
74HC
SYMBOL PARAMETER
min.
t
PHL
/ t
PLH
propagation delay
nCP to nQ
propagation delay
nCP to nQ
propagation delay
nR to nQ, nQ
+25
typ.
52
19
15
52
19
15
52
19
15
19
7
6
80
16
14
80
16
14
60
12
10
100
20
17
3
3
3
6.0
30
35
22
8
6
22
8
6
19
7
6
22
8
6
−6
−2
−2
23
70
85
−40
to
+85
−40
to
+125
UNIT
74HC/HCT107
TEST CONDITIONS
V
CC
WAVEFORMS
(V)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
max. min. max. min. max.
160
32
27
160
32
27
155
31
26
75
15
13
100
20
17
100
20
17
75
15
13
125
25
21
3
3
3
4.8
24
28
200
40
34
200
40
34
195
39
33
95
19
16
120
24
20
120
24
20
90
18
15
150
30
26
3
3
3
4.0
20
24
240
48
41
240
48
41
235
47
40
110
22
19
ns
Fig.6
t
PHL
/ t
PLH
ns
Fig.6
t
PHL
/ t
PLH
ns
Fig.7
t
THL
/ t
TLH
output transition time
ns
Fig.6
t
W
clock pulse width
HIGH or LOW
reset pulse width
LOW
removal time
nR to nCP
set-up time
nJ, nK to nCP
hold time
nJ, nK to nCP
maximum clock pulse
frequency
ns
Fig.6
t
W
ns
Fig.7
t
rem
ns
Fig.7
t
su
ns
Fig.6
t
h
ns
Fig.6
f
max
MHz
Fig.6
December 1990
5
PHILIPS [ NXP SEMICONDUCTORS ]
