Philips Semiconductors
Product specification
8-bit shift register with input flip-flops
74HC/HCT597
Fig.4 Functional diagram.
FUNCTION TABLE
STCP
SHCP
PL
MR
FUNCTION
↑
X
X
X
X
X
↑
X
L
X
H
H
L
data loaded to input latches
↑
data loaded from inputs to shift register
no clock edge
L
data transferred from input flip-flops to shift register
invalid logic, state of shift register indeterminate when signals removed
shift register cleared
X
X
X
L
H
H
L
H
shift register clocked Qn = Qn−1, Q0 = DS
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
↑ = LOW-to-HIGH CP transition
December 1990
4