74HC4052; 74HCT4052
NXP Semiconductors
Dual 4-channel analog multiplexer/demultiplexer
V
I
V
M
E, Sn inputs
0 V
t
PZL
t
PLZ
50 %
V
output
output
os
os
10 %
t
t
PHZ
PZH
90 %
50 %
V
switch ON
switch OFF
switch ON
001aae330
For 74HC4052: VM = 0.5 × VCC
.
For 74HCT4052: VM = 1.3 V.
Fig 14. Turn-on and turn-off times
t
W
V
I
90 %
negative
pulse
V
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
M
M
10 %
0 V
t
W
V
V
V
CC
is
CC
V
V
os
I
S1
R
L
PULSE
GENERATOR
open
DUT
R
C
L
T
GND
V
EE
001aae382
Definitions for test circuit; see Table 11:
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
CL = load capacitance including jig and probe capacitance.
RL = load resistance.
S1 = Test selection switch.
Fig 15. Test circuit for measuring AC performance
74HC_HCT4052
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 11 May 2011
15 of 28
NXP [ NXP ]
