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74HC4052D-Q100 参数 Datasheet PDF下载

74HC4052D-Q100图片预览
型号: 74HC4052D-Q100
PDF下载: 下载PDF文件 查看货源
内容描述: [SGL ENDED MULTIPLEXER]
分类和应用: 光电二极管
文件页数/大小: 26 页 / 304 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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74HC4052-Q100; 74HCT4052-Q100
Dual 4-channel analog multiplexer/demultiplexer
Rev. 2 — 22 November 2012
Product data sheet
1. General description
The 74HC4052-Q100; 74HCT4052-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance
with JEDEC standard no. 7A.
The 74HC4052-Q100; 74HCT4052-Q100 is a dual 4-channel analog
multiplexer/demultiplexer with common select logic. Each multiplexer has four
independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The
common channel select logics include two digital select inputs (pins S0 and S1) and an
active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected
(low-impedance ON-state) with pins S0 and S1. When pin E = HIGH, all switches are in
the high-impedance OFF-state, independent of pins S0 and S1.
V
CC
and GND are the supply voltage pins for the digital control inputs (pins S0, S1 and E).
The V
CC
to GND ranges are 2.0 V to 10.0 V for the 74HC4052-Q100, and 4.5 V to 5.5 V
for the 74HCT4052-Q100. The analog inputs/outputs (pins nY0 to nY3 and nZ) can swing
between V
CC
as a positive limit and V
EE
as a negative limit. V
CC
V
EE
may not exceed
10.0 V. For operation as a digital multiplexer/demultiplexer, V
EE
is connected to GND
(typically ground).
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide analog input voltage range from
5
V to +5 V
Low ON resistance:
80
(typical) at V
CC
V
EE
= 4.5 V
70
(typical) at V
CC
V
EE
= 6.0 V
60
(typical) at V
CC
V
EE
= 9.0 V
Logic level translation: to enable 5 V logic to communicate with
5
V analog signals
Typical ‘break before make’ built-in
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
CDM AEC-Q100-011 revision B exceeds 1000 V
Multiple package options