NXP Semiconductors
74HC4051; 74HCT4051
8-channel analog multiplexer/demultiplexer
7. Functional description
7.1 Function table
Table 3.
Input
E
L
L
L
L
L
L
L
L
H
[1]
Function table
Channel ON
S2
L
L
L
L
H
H
H
H
X
S1
L
L
H
H
L
L
H
H
X
S0
L
H
L
H
L
H
L
H
X
Y0 to Z
Y1 to Z
Y2 to Z
Y3 to Z
Y4 to Z
Y5 to Z
Y6 to Z
Y7 to Z
switches off
H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol
V
CC
I
IK
I
SK
I
SW
I
EE
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
switch clamping current
switch current
supply current
supply current
ground current
storage temperature
total power dissipation
DIP16 package
SO16, (T)SSOP16, and
DHVQFN16 package
P
[1]
Conditions
Min
0.5
-
-
-
-
-
-
65
-
-
-
Max
+11.0
20
20
25
20
50
50
+150
750
500
100
Unit
V
mA
mA
mA
mA
mA
mA
C
mW
mW
mW
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
SW
<
0.5
V or V
SW
> V
CC
+ 0.5 V
0.5
V < V
SW
< V
CC
+ 0.5 V
power dissipation
per switch
To avoid drawing V
CC
current out of terminal Z, when switch current flows into terminals Yn, the voltage drop across the bidirectional
switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V
CC
current will flow out of terminals Yn, and in this case
there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed V
CC
or V
EE
.
For DIP16 packages: above 70
C
the value of P
tot
derates linearly with 12 mW/K.
For SO16 packages: above 70
C
the value of P
tot
derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60
C
the value of P
tot
derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
[2]
[3]
74HC_HCT4051
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 7 — 19 July 2012
5 of 31
PHILIPS [ NXP SEMICONDUCTORS ]
