Philips Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
8.2 Timing diagram
1
CP input
MR input
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
001aad587
2
4
8
16
32
64
128
256
512 1024 2048 4096
Fig 7. Timing diagram
9. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input diode current
output diode current
output source or sink current
quiescent supply current
ground current
storage temperature
power dissipation
DIP16 package
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
[1]
Conditions
V
I
<
−0.5
V or VI > V
CC
+ 0.5 V
V
I
<
−0.5
V or V
I
> V
CC
+ 0.5 V
−0.5
V < V
O
< V
CC
+ 0.5 V
Min
−0.5
-
-
-
-
-
−65
Max
+7
±20
±20
±25
±50
±50
+150
750
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
mW
T
amb
=
−40 °C
to +125
°C
-
-
For DIP16 packages: above 70
°C,
P
tot
derates linearly with 12 mW/K.
For SO16, SSOP16, TSSOP16 and DHVQFN16 packages, above 70
°C,
P
tot
derates linearly with 8 mW/K.
74HC_HCT4040_3
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 03 — 14 September 2005
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