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74HC4017 参数 Datasheet PDF下载

74HC4017图片预览
型号: 74HC4017
PDF下载: 下载PDF文件 查看货源
内容描述: 10解码输出约翰逊十进制计数器 [Johnson decade counter with 10 decoded outputs]
分类和应用: 计数器
文件页数/大小: 12 页 / 90 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Product specification  
Johnson decade counter with 10 decoded outputs  
74HC/HCT4017  
APPLICATION INFORMATION  
Some applications for the “4017” are:  
Decade counter with decimal decoding  
1 out of n decoding counter (when cascaded)  
Sequential controller  
Timer  
Figure 10 shows a technique for extending the number of decoded output states for the “4017”. Decoded outputs are  
sequential within each stage and from stage to stage, with no dead time (except propagation delay).  
It is essential not to enable the counter on CP1  
when CP0 is HIGH, or on CP0 when CP1 is LOW,  
as this would cause an extra count.  
Fig.10 Counter expansion  
Figure 11 shows an example of a divide-by 2 through divide-by 10 circuit using one “4017”. Since “4017” has an  
asynchronous reset, the output pulse widths are narrow (minimum expected pulse width is 6 ns). The output pulse widths  
can be enlarged by inserting a RC network at the MR input.  
Fig.11 Divide-by 2 through divide-by 10.  
PACKAGE OUTLINES  
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.  
December 1990  
12  
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