Philips Semiconductors
Product specification
Quad 2-input NAND gate
74HC00; 74HCT00
handbook, halfpage
1A
1
VCC
14
13
12
4B
4A
4Y
B
3B
3A
handbook, halfpage
1B
1Y
2A
2B
2Y
2
3
4
5
6
7
Top view
GND
8
3Y
A
Y
MNA211
GND
(1)
11
10
9
MNA950
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic diagram (one gate).
handbook, halfpage
handbook, halfpage
1
2
&
3
1
2
4
5
9
10
12
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y
3
4
&
6
2Y
6
5
3Y
8
9
10
&
8
4Y
11
12
&
11
MNA212
13
MNA246
Fig.4 Function diagram.
Fig.5 IEC logic symbol.
2003 Jun 30
4