NXP Semiconductors
TDA5051A
Home automation modem
Remark:
In transmission mode, the receiving part of the circuit is
not disabled
and the
detection of the transmitted signal is normally performed. In this mode, the gain chosen
before the beginning of the transmission is stored, and the
AGC is internally set to
−6
dB
as long as DATA_IN is LOW. Then, the old gain setting is
automatically restored.
8.2 Reception mode
The input signal received by the modem is applied to a wide range input amplifier with
AGC (−6 dB to +30 dB). This is basically for noise performance improvement and signal
level adjustment, which ensures a maximum sensitivity of the ADC. An 8-bit conversion is
then performed, followed by digital band-pass filtering, to meet the CISPR16
normalization and to comply with some additional limitations met in current applications.
After digital demodulation, the baseband data signal is made available after pulse
shaping.
The signal pin (RX_IN) is a high-impedance input which has to be protected and
DC decoupled for the same reasons as with pin TX_OUT. The high sensitivity (82 dBμV)
of this input requires an efficient 50 Hz rejection filter (realized by the LC coupling
network), which also acts as an anti-aliasing filter for the internal digital processing;
(see
Figure 15).
8.3 Data format
8.3.1 Transmission mode
The data input (DATA_IN) is active LOW: this means that a burst is generated on the line
(pin TX_OUT) when DATA_IN pin is LOW.
Pin TX_OUT is in a high-impedance state as long as the device is not transmitting.
Successive logic 1s are treated in a Non-Return-to-Zero (NRZ) mode, see pulse shapes
in
Figure 8
and
Figure 9.
8.3.2 Reception mode
The data output (pin DATA_OUT) is active LOW; this means that the data output is LOW
when a burst is received. Pin DATA_OUT remains LOW as long as a burst is received.
8.4 Power-down mode
Power-down input (pin PD) is active HIGH; this means that the power consumption is
minimum when pin PD is HIGH. Now, all functions are disabled, except clock generation.
TDA5051A
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 13 January 2011
6 of 29
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