PE4259
Product Specification
Evaluation Kit
The SPDT switch EK Board was designed to ease
customer evaluation of Peregrine’s PE4259. The
RF common port is connected through a 50
Ω
transmission line via the top SMA connector, J1.
RF1 and RF2 are connected through 50
Ω
transmission lines via SMA connectors J2 and J3,
respectively. A through 50
Ω
transmission is
available via SMA connectors J4 and J5. This
transmission line can be used to estimate the loss
of the PCB over the environmental conditions
being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The
bottom layer provides ground for the RF
transmission lines. The transmission lines were
designed using a coplanar waveguide with ground
plane model using a trace width of 0.0476”, trace
gaps of 0.030”, dielectric thickness of 0.028”,
metal thickness of 0.0021” and
ε
r
of 4.4.
J6 and J7 provide a means for controlling DC and
digital inputs to the device. J6-1 is connected to
the device V
DD
or CTRL input. J7-1 is connected
to the device CTRL input.
Figure 8. Evaluation Board Layouts
Peregrine Specification 101/0162
Figure 9. Evaluation Board Schematic
Peregrine Specification 102/0218
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 8
Document No. 70-0134-02
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UltraCMOS™ RFIC Solutions
PEREGRINE [ PEREGRINE SEMICONDUCTOR CORP. ]
