Silicon MOS FETs (Small Signal)
P
D
Ta
240
120
Ta=25˚C
200
100
100
2SK665
I
D
V
DS
120
V
DS
=5V
I
D
V
GS
Allowable power dissipation P
D
(mW)
Drain current I
D
(mA)
160
80
Drain current I
D
(mA)
V
GS
=6.0V
5.5V
5.0V
4.5V
40
80
Ta=–25˚C
25˚C
120
60
60
75˚C
80
4.0V
3.5V
3.0V
40
40
20
20
0
0
20
40
60
80 100 120 140 160
0
0
2
4
6
8
10
0
0
2
4
6
8
10
Ambient temperature Ta (˚C)
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
| Y
fs
|
V
GS
50
C
iss
, C
oss
V
DS
Input capacitance (Common source),
Output capacitance (Common source) C
iss
,C
oss
(pF)
V
DS
=5V
Ta=25˚C
V
GS
=0
f=1MHz
Ta=25˚C
C
iss
8
R
DS(on)
V
GS
Drain to source ON-resistance R
DS(on)
(
Ω
)
120
I
D
=20mA
100
12
Forward transfer admittance |Y
fs
| (mS)
40
10
80
30
6
60
Ta=75˚C
20
4
C
oss
40
25˚C
–25˚C
10
2
20
0
0
2
4
6
8
10
0
0.1
0
0
2
4
6
8
10
0.3
1
3
10
30
100
Gate to source voltage V
GS
(V)
Drain to source voltage V
DS
(V)
Gate to source voltage V
GS
(V)
V
IN
I
O
1000
300
V
O
=1V
Ta=25˚C
Input voltage V
IN
(V)
100
30
10
3
1
0.3
0.1
0.1
0.3
1
3
10
30
100
Output current I
O
(mA)
2
PANASONIC [ PANASONIC SEMICONDUCTOR ]
