PAM8803
3W Filterless Stereo Class-D Audio Amplifier
with Digital Volume Control
Most applications require a ferrite bead filter
channel specific. A two channels amplifier has
t w o m u t u a l l y e x c l u s i v e c h a n n e l s a n d
consequently must have two mutually exclusive
output noise ground traces. The layout of the
PAM8803 offers separate PGND connections for
each channel and in some cases each side of the
bridge. Output noise grounds must tie to system
ground at the power in exclusively. Signal
currents for the inputs, reference, etc need to be
returned to quite ground. This ground only ties to
the signal components and the GND pin. GND
then ties to system ground.
which shows at Figure 3. The ferrite filter
reduces EMI around 1 MHz and higher. When
selecting a ferrite bead, choose one with high
impedance at high frequencies, but low
impedance at low frequencies.
Ferrite Bead
OUT+
220pF
Ferrite Bead
OUT-
Power Supply Line
220pF
As same to the ground, VDD and each channel
PVDD need to be separated and tied together at
the system power supply. Recommend that all
the trace could be routed as short and thick as
possible. For the power line layout, just imagine
water stream, any barricade placed in the trace
(shows in figure 4) could result in the bad
performance of the amplifier.
Figure 3: Ferrite Bead Filter to reduce EMI
PCB Layout Guidelines
Grounding
At this stage it is paramount that we
acknowledge the need for separate grounds.
Noise currents in the output power stage need to
be returned to output noise ground and nowhere
else. Were these currents to circulate elsewhere,
they may get into the power supply, the signal
ground, etc, worse yet, they may form a loop and
radiate noise. Any of these instances results in
degraded amplifier performance. The logical
returns for the output noise currents associated
with Class D switching are the respective PGND
pins for each channel. The switch state diagram
illustrates that PGND is instrumental in nearly
every switch state. This is the perfect point to
which the output noise ground trace should
return. Also note that output noise ground is
Figure 4
Components Placement
The power supply decoupling capacitors need to
be placed as close to VDD and PVDD pins as
possible. The inputs need to be routed away from
the noisy trace. The VREF bypass capacitor also
needs to be close to the pin of IC very much.
PCB Top Layer
PCB Bottom Layer
Figure 5: Layout Example
Power Analog Microelectronics,Inc
www.poweranalog.com
12/2009 Rev 1.4
11
PAM [ POWER ANALOG MICOELECTRONICS ]
