PFS122
8bit MTP MCU with 12-bit R-Type ADC
Symbol
Description
Min
Typ
Max
Unit
Conditions (Ta=25oC)
15.76*
16.24*
25oC, VDD =2.0V~5.5V
VDD =2.0V~5.5V,
-20oC <Ta<70oC*
VDD =1.8V~5.5V,
15.20*
13.60*
16.80*
18.40*
Frequency of IHRC after
fIHRC
16*
MHz
calibration *
-20oC <Ta<70oC*
tINT
Interrupt pulse width
AD Input Voltage
30
0
ns
V
VDD = 5.0V
VAD
VDD
12
10
0.9
0.8
2
0oC <Ta<50oC*
-20oC <Ta<70oC*
@5V
ADrs
ADC resolution
bit
ADcs
ADclk
ADC current consumption
mA
us
@3V
ADC clock period
1.8V ~ 5.5V
ADC conversion time
tADCONV (tADCLK is the period of the
selected AD conversion clock)
16
tADCLK 12-bit resolution
AD DNL ADC Differential Non-Linearity
±4*
±8*
5*
LSB
LSB
mV
V
12-bit resolution LSB
12-bit resolution LSB
@ VDD =3V
AD INL ADC Integral Non-Linearity
ADos
VDR
ADC offset
RAM data retention voltage*
1.5
in stop mode
8k
misc[1:0]=00 (default)
misc[1:0]=01
16k
tWDT
Watchdog timeout period
TILRC
64k
256k
45
misc[1:0]=10
misc[1:0]=11
Wake-up time period (fast)
Wake-up time period (slow)
Where TILRC is the time
period of ILRC
tWUP
TILRC
3000
System boot-up period from
power-on for Slow boot-up
System boot-up period from
power-on for Fast boot-up
External reset pulse width
50
ms
us
VDD =5V
tSBP
750
VDD =5V
tRST
120
-
us
@ VDD =5V
CPos
CPcm
Comparator offset*
Comparator input common
mode*
±10
±20
VDD -1.5
500
mV
0
V
CPspt
CPmc
Comparator response time*
Stable time to change
comparator mode
Comparator current
consumption
100
2.5
ns
us
Both Rising and Falling
7.5
CPcs
20
uA
VDD = 3.3V
*These parameters are for design reference, not tested for each chip.
©Copyright 2020, PADAUK Technology Co. Ltd
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PDK-DS-PFS122-EN_V000-May 28, 2020
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