OXU140CM Data Sheet
Oxford Semiconductor, Inc.
Table 14 lists the BGA pin allocations.
Table 14 OXU140CM 100-Ball BGA Pin Allocations (Sheet 1 of 3)
(1)
Pin
No.
Pins
Name
Description
Type
Processor Interface (39 pins)
B3, A3, B2, C3,
B1, A2, C1, A1,
C2, D1, D3, D2,
E4, E3, E2, E1
16
MSBCT
D - D
16-bit data bus
0
15
G3, F2, G1, G2,
J7, H4, J4, K4,
H5, K5, J5, H6,
J6, G6
14
MSID
A - A
Address bus for direct address space
1
14
F3
F1
K6
D4
1
1
1
1
MSIU
MSIU
MSIU
MOCT
/WR
/RD
/CS
/INT
Write strobe
Read strobe
Chip select
Interrupt to the MCU.This pin can be software
configured as a driven output or open drain. Open
drain is the default
C6
1
2
2
MSIU
MOCT
MSI
/RESET
DRQ , DRQ
Hardware reset
C5, B5
B4, A4
DMA request outputs to support two channels
DMA acknowledge
1
0
ACK , ACK
1
0
General Purpose I/O (3 pins)
A7, A5, C4
Power & Ground (21 pins)
3
MSBC
GPIO, GPX , GPX
General purpose I/O
A
B
B7, C8, C9, J8,
K9
5
V
V
Analog +3.3 V power
Analog ground
DD3.3A
SSA
B10, C7, D10,
H7, J10
5
D6, D7
2
3
V
V
Digital +3.3 V power
DD3.3
DD1.8
F4, F7, G7
1.8 V core power. VREGOUT may be used for the
supplies
D5. E5
2
V
Wide-range I/O +1.65 V to +3.6 V for the processor
interface
DDW
G5
1
3
V
V
Wide-range I/O +1.65 V to +3.6 V for the media port
Digital/wide-range I/O ground
DDCE
SS
E6, F5, F6
USB Interface (13 pins)
H8 J9
2
B
B
DM , DP
Data lines for USB peripheral port, which may serve
as an OTG port in combination with host port 1. If not
used, these two pins should be left floating
P
P
G8, H9
2
DM , DP
Data lines for Host Port 1, which may serve as a USB
host or an OTG port in combination with the
peripheral port. If not used, these two pins should be
left floating
1
1
14
External--Free Release
DS-0038 Jul 06
OXFORD [ OXFORD SEMICONDUCTOR ]
