OXCB950
OXFORD SEMICONDUCTOR LTD.
Note 3: Power & Ground
There are several types of VDD and VSS in this design, providing not only power for the internal (core) and I/O pad area but also
special power lines to the dual mode cardbus/pci I/O buffers. These power rails are not connected internally.
This precaution reduces the effects of simultaneous switching outputs and undesirable RF radiation from the chip. Further
precaution is taken by segmenting the GND and VDD rails to isolate the PCI and UART pins.
Pinout Assignment
This device implements the “common” silicon requirements given in the PC Card Standard, release 7.x.
The pinouts for this device have been assigned specifically to align the cardbus signals to the cardbus connector without any
signal crossovers. Since the assignment of signal pins on the cardbus connector is in a different sequence than those on the PCI
connector (due to the limitations of the cardbus connector) then crossovers do occur in the PCI environment. The following signal
lines are affected for the PCI environment : SERR#, AD16, INTA, CLK, and RST#.
DS-0033 Sep 05
External-Free Release
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