欢迎访问ic37.com |
会员登录 免费注册
发布采购

RS2042P 参数 Datasheet PDF下载

RS2042P图片预览
型号: RS2042P
PDF下载: 下载PDF文件 查看货源
内容描述: 绿色节能PWM控制器频率,。抖动 [Green-Power PWM Controller with Freq,. Jittering]
分类和应用: 控制器
文件页数/大小: 8 页 / 233 K
品牌: ORISTER [ ORISTER CORPORATION ]
 浏览型号RS2042P的Datasheet PDF文件第2页浏览型号RS2042P的Datasheet PDF文件第3页浏览型号RS2042P的Datasheet PDF文件第4页浏览型号RS2042P的Datasheet PDF文件第5页浏览型号RS2042P的Datasheet PDF文件第6页浏览型号RS2042P的Datasheet PDF文件第7页浏览型号RS2042P的Datasheet PDF文件第8页  
Page No. : 1/1
RS2042
Green-Power PWM Controller with Freq. Jittering
Description
The RS2042 is a low startup current, low cost, current mode PWM controller with Green-Power & burst-mode power-saving
operation. The integrated functions such as the leading-edge blanking of the current sensing, internal slope compensation
provide the users a high efficiency, low external component counts, and low cost solution for AC/DC power applications. The
special Green-Power function provides off-time modulation to linearly decrease the switching frequency under light-load
conditions. And under zero-load conditions, the power supply enters burst-mode to further reduce power consumption by
shutting off PWM output. When the output of power supply is short or over loaded, the FB voltage will increase, and if the FB
voltage is higher than 5.2V for longer than 56msec the PWM output will be turned off. A external NTC resistor connected from
pin RT to ground can be applied to over-temperature protection. Pulse by pulse current limit ensures a constant output current
even under short circuit. PWM output will be disabled as long as VDD exceeds a threshold. When internal latch circuit is used to
latch-off the controller, the latch will be reset when the power supply VDD is disabled.
Features
Low Cost, Green-Power Burst-Mode PWM
Very Low Start-up Current (about 7.5μA)
Low Operating Current (about 3.0mA)
Current Mode Operation
Under Voltage Lockout (UVLO)
VDD Over Voltage Protection (OVP)
Programmable over-temperature protection
Internal Latch Circuit (OTP, OVP)
Built-in soft start with 1ms
Built-in Frequency jitter for better EMI Signature
Soft Clamped gate output voltage 16.5V
VDD over voltage protect 25.5V
Cycle-by-cycle current limiting
Sense Fault Protection
Output SCP (Short circuit Protection)
Built-in Synchronized Slope Compensation
Leading-edge blanking on Sense input
Programmable PWM Frequency
High-Voltage CMOS Process with ESD
DIP-8 & SOP-8 Pb-Free Package
Compatible with SG6842J&LD7552&OB2269 & SG6841
& OB2268
Applications
Power Adaptor
Battery Charger Adapter
Open Frame Switching Power Supply
LCD Monitor
Pin Configurations
Name
GND
FB
Description
GND Pin
Voltage feedback pin. The PWM duty cycle is determined by FB and Sense.
This pin is pulled high to the rectified line input through a large resistor for start-up.
This pin is also used to detect line voltage to compensate for constant output
power limit for universal AC input.
By connecting a resistor to ground to set the switching freq.. Increasing the
resistor will reduce the switching freq..
An NTC resistor is connected from this pin to ground for over-temperature
protection.
Current sense pin, The sensed voltage is used for current-mode control and pulse-
by-pulse current limiting.
Power supply voltage pin.
Gate drive output to drive the external MOSFET.A soft driving waveform is
implemented to improve EMI.
1
2
3
4
GND
FB
VIN
RI
GATE
VDD
SENSE
RT
8
7
6
5
VIN
RI
RT
SENSE
VDD
GATE
DS-RS2042-01
May, 2007
www.Orister.com