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UC3843AD 参数 Datasheet PDF下载

UC3843AD图片预览
型号: UC3843AD
PDF下载: 下载PDF文件 查看货源
内容描述: 高性能电流模式控制器 [High Performance Current Mode Controllers]
分类和应用: 开关光电二极管控制器
文件页数/大小: 18 页 / 360 K
品牌: ONSEMI [ ON SEMICONDUCTOR ]
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UC3842A, UC3843A, UC2842A, UC2843A
PIN FUNCTION DESCRIPTION
Pin
8−Pin
1
2
3
4
5
6
7
8
14−Pin
1
3
5
7
10
12
14
8
Function
Compensation
Voltage
Feedback
Current Sense
R
T
/C
T
GND
Output
V
CC
V
ref
Power Ground
Description
This pin is Error Amplifier output and is made available for loop compensation.
This is the inverting input of the Error Amplifier. It is normally connected to the switching pow-
er supply output through a resistor divider.
A voltage proportional to inductor current is connected to this input. The PWM uses this infor-
mation to terminate the output switch conduction.
The Oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor R
T
to V
ref
and capacitor C
T
to ground. Operation to 500 kHz is possible.
This pin is the combined control circuitry and power ground (8−pin package only).
This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are
sourced and sunk by this pin.
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor C
T
through
resistor R
T
.
This pin is a separate power ground return (14−pin package only) that is connected back
to the power source. It is used to reduce the effects of switching transient noise on the control
circuitry.
The Output high state (V
OH
) is set by the voltage applied to this pin (14−pin package only).
With a separate power source connection, it can reduce the effects of switching transient
noise on the control circuitry.
This pin is the control circuitry ground return (14−pin package only) and is connected back to
the power source ground.
No connection (14−pin package only). These pins are not internally connected.
11
V
C
9
2,4,6,13
GND
NC
Undervoltage Lockout
Two undervoltage lockout comparators have been
incorporated to guarantee that the IC is fully functional
before the output stage is enabled. The positive power
supply terminal (V
CC
) and the reference output (V
ref
) are
each monitored by separate comparators. Each has built−in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The V
CC
comparator
upper and lower thresholds are 16 V/10 V for the UCX842A,
and 8.4 V/7.6 V for the UCX843A. The V
ref
comparator
upper and lower thresholds are 3.6V/3.4 V. The large
hysteresis and low startup current of the UCX842A makes
it ideally suited in off−line converter applications where
efficient bootstrap startup techniques are required
(Figure 34). The UCX843A is intended for lower voltage dc
to dc converter applications. A 36 V zener is connected as
a shunt regulator form V
CC
to ground. Its purpose is to
protect the IC from excessive voltage that can occur during
system startup. The minimum operating voltage for the
UCX842A is 11 V and 8.2 V for the UCX843A.
Output
and has a typical rise and fall time of 50 ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
Output in a sinking mode whenever an undervoltage lockout
is active. This characteristic eliminates the need for an
external pull−down resistor.
The SOIC−14 surface mount package provides separate
pins for V
C
(output supply) and Power Ground. Proper
implementation will significantly reduce the level of
switching transient noise imposed on the control circuitry.
This becomes particularly useful when reducing the I
pk(max)
clamp level. The separate V
C
supply input allows the
designer added flexibility in tailoring the drive voltage
independent of V
CC
. A zener clamp is typically connected
to this input when driving power MOSFETs in systems
where V
CC
is greater than 20 V. Figure 26 shows proper
power and control ground connections in a current sensing
power MOSFET application.
Reference
These devices contain a single totem pole output stage that
was specifically designed for direct drive of power
MOSFETs. It is capable of up to
±1.0
A peak drive current
The 5.0 V bandgap reference is trimmed to
±1.0%
tolerance at T
J
= 25°C on the UC284XA, and
±
2.0% on the
UC384XA. Its primary purpose is to supply charging current
to the oscillator timing capacitor. The reference has short
circuit protection and is capable of providing in excess of
20 mA for powering additional control system circuitry.
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