UC3844, 45 UC2844, 45
Figure 15. Representative Block Diagram
VCC
VCC
7(12)
36V
+
–
VC
Vref
UVLO
T Q
1.0mA
S
2R
R
1.0V
Current Sense
Comparator
Gnd
5(9)
+
–
=
–
+
Q
R
PWM
Latch
7(11)
Output
6(10)
Power Ground
5(8)
Current Sense Input
3(5)
RS
Q1
Vin
Vref
8(14)
R
2.5V
RT
R
3.6V
Oscillator
4(7)
CT
Voltage Feedback
Input
2(3)
Output
Compensation
1(1)
+
–
Error
Amplifier
+
Internal
Bias
Reference
Regulator
+
+ –
–
+
VCC
UVLO
–
Sink Only
Positive True Logic
Pin numbers in parenthesis are for the D suffix SO–14 package.
Figure 16. Timing Diagram
Capacitor CT
Latch
‘‘Set’’ Input
Output/
Compensation
Current Sense
Input
Latch
‘‘Reset’’ Input
Output
Large RT/Small CT
Small RT/Large CT
8
MOTOROLA ANALOG IC DEVICE DATA
ONSEMI [ ON SEMICONDUCTOR ]
